How to build and test a module
parameter
- defparam修改参数
Task & function
Task
Function
- function不可以调用task,因为task有时间信息
- task可以调用function
System Task
System Function
Coversion Function
XMR
Hierarchical Module
Verilog 2001 New features
- 模块的接口
- parameter
- sensitive list
- Vector Part Select
- Multi-Dimensional Array
- Arrays of Net and Real
- Arrays Bit and Part Select
- power Operator **
- Generate
